Lap Chan

Adjunct Professor

Email: ync_puna@fhgq.rqh.ft
Telephone: +65 6499 4631
Research Areas:
Electrical Engineering

Pillar / Cluster: Engineering Product Development


Lap Chan was a Fellow with GlobalFoundries Singapore (formally Chartered Semiconductor Manufacturing Pte Ltd) and worked in various departments for 18.5 years. Lap joined its Technology Development in 1993 and led a team of R&D engineers to be the pioneer batch of Singapore researchers to develop deep submicron MOS device fabrication, which included module development (e.g. process to define gate patterning, metal silicide deposition, rapid thermal anneal, and CMP), process integration (e.g. issues related to STI isolation, shallow junction formation and Cu interconnect), test chip design, and the fabrication of RF passive components. Before coming to Singapore from US, he held different engineering positions with Perkin-Elmer Physical Electronics, Honeywell and Hewlett-Packard. He has published more than 150 journal publications in various areas of IC device fabrication and received more than 140 US patents in the area of semiconductor IC manufacturing. One of his major scientific contributions was introducing the HBr based plasma chemistry in the 90s to semiconductor industry on how to pattern polysilicon gate.


  • Ph.D. in Chemical Engineering, University of Minnesota, 1985
    (Thesis Advisor: Prof. Gregory L . Griffin)
  • B.Sc. in Chemistry, State University of New York at Stony Brook, 1980
    (FYP Advisor: Prof. Paul C. Lauterbur, Nobel Laureate, 2003)

Research Interest

To re-engineer the old world technology and manufacturing for the new world

Key Publications

  1. “Effects of switching from <110> to <100> channel orientation and tensile stress on n-channel and p-channel metal-oxide-semiconductor transistors”, Solid-State Electronics, Vol 54, Issue 4, Apr 2010, Pages 461-474
  2. Observation of halo implant from the drain side reaching the source side and vice versa in extremely short p-channel transistors”, Microelectronics Reliability, Vol 50, Issue 3, Mar 2010, Pages 346-350
  3. Charge-induced conductance modulation of carbon nanotube field effect transistor memory devices”, Carbon, Vol 47, Issue 13, Nov 2009, Pages 3063-307
  4. The impact of nitrogen co-implantation on boron ultra-shallow junction formation and underlying physical understanding”, Materials Science and Engineering B – Advanced Functional Solid State Materials, Vol 154, Pages: 43-48, Dec 2008
  5. “Influence of hydrogen dispersive diffusion in nitrided gate oxide on negative bias temperature instability”, Applied Physics Letters, Vol 93, Issue 1, Article Number 013501, Jul 2008
  6. “High-k gate stack on germanium substrate with fluorine incorporation”, Applied Physics Letters, Vol 92, Issue 16, Article Number 163505, Apr 2008